Analysis and Suppression of the Frequency-Aliasing Phenomenon Related to the Sorting-Algorithm-Based Voltage-Balance Strategy in an MMC System

The frequency-aliasing phenomenon, which can distort high-frequency harmonics in the analog input signal into low-frequency harmonics in the output digital signal, is widespread in the process of analog to digital conversions. The sorting-algorithm-based voltage-balance strategy is also such a conversion process. This strategy converts the analog-continuous-sinusoidal fundamental wave into the digital-discrete inserted-submodule number, deciding how many submodules are required to operate in modular multilevel converters (MMC). Thus, the frequency-aliasing phenomenon can occur in this strategy and deteriorate the performance of MMC as well. This article first proposes the mechanism of the frequency-aliasing phenomenon in the sorting-algorithm-based voltage-balance strategy. A quantitative analysis is then presented to indicate the root cause of the frequency-aliasing phenomenon in the voltage-balance strategy. This analysis also intuitively describes the frequency-aliasing phenomenon's effect, such as harmonic redistributions in the large-signal model, the phase delay in the small-signal model, and the associated deteriorations including the system stability's decrease and the power quality's reduction. Based on the above analysis, an optimal value design method is proposed to suppress the frequency-aliasing phenomenon by determining an appropriate voltage-balance frequency. A code restructuration method is further implemented to adapt the voltage-balance strategy to the optimal frequency and to avoid extra switching actions at the same time. The deteriorations caused by the frequency-aliasing phenomenon and the effectiveness of proposed methods are finally demonstrated via simulations experiments.