A Nonlinear Three-Phase Phase-Locked Loop Based on Linear Active Disturbance Rejection Controller

2017 
Three-phase phase-locked loops (PLLs) are the most widely used synchronization components in power systems. For common PLL algorithms, there is a tradeoff between the filtering capability and dynamic response. In this paper, a nonlinear PLL (NLADRC-PLL) based on a linear active disturbance rejection controller (LADRC) is proposed to largely improve this tradeoff, thus simultaneously enhancing the filtering capability and dynamic response. With LADRC adopted in PLL structures (LADRC-PLL), good dynamic response and disturbance rejection capability can be achieved. To pursue further improvements in both filtering capability and dynamic response, the NLADRC-PLL derived from the LADRC-PLL is proposed, which adjusts the controller gains adaptively according to the disturbance. It is commonly known that there are stability problems for PLLs with adaptive controller gains, which are highly nonlinear systems. Thanks to the great robustness of LADRC structures, the stability of the proposed NLADRC-PLL is certified by the second method of Lyapunov in the nonlinear model. By comparing its PLL performance with the existing PLL algorithms, the superiority of the NLADRC-PLL in both filtering capability and dynamic response is verified through experimental results.
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