Miniaturization of Space Electronics with Chip-on-Board Technology

iniaturization of space electronics by eliminating individual chip packages is attractive not only because of the advantage of reduction in both volume and weight but also because of the potential improvement in reliability associated with elimination of the first level of packaging at the chip. Most importantly, miniaturization can lead to significant cost saving in a space program since a smaller launch vehicle may be used. The APL study of chip-on-board technology began with the miniaturization of a magnetometer signal processor to verify the manufacturability of the new advanced packaging process. Subsequently, encapsulant-covered dynamic-random-access-memory test boards and triple-track chips were subjected to an environmental stress program to qualify the technology for flight. This article presents an overview of the chip-on-board technology: the approach, methodology, and test results and its significance and potential effect on the future direction of space programs.