2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer

This paper presents a 2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). A nonlinear current steering digital to analog converter (DAC) has been utilized to convert phase word to sine wave amplitude directly without area consuming ROM for the sine look-up table, which is the speed bottleneck of the DDFS circuit. In order to achieve high speed performance and low power dissipation, CMOS current mode logic (CML) is chosen to implement the logic cells. A semi-symmetrical switching scheme of current source matrix of the nonlinear DAC is proposed to compensate the systematic and gradient errors introduced by the processing and environment variations. The DDFS chip is implemented in Chartered 0.35 /spl mu/m CMOS technology with die area of 2.1/spl times/1.9 mm/sup 2/ and total power consumption of 820 mW at 3.3 V supply voltage.