An 800 MOPS 110 mW 1.5 V parallel DSP for mobile multimedia processing
1998
The central signal-processing unit for a portable multimedia terminal in the coming wide-band wireless communication age should meet the following three requirements: (1) high-performance for processing video-class wide-band digital signals, (2) low-power for extended battery life, (3) programmability to cope with applications with a small chip count. Conventional DSPs lack the high-performance, while emerging media processors consume too much power. This DSP exploits task-level, coarse-grained parallelism inherent in multimedia applications. This chip achieves performance in a power-efficient manner, while maintaining the programmability of conventional DSPs.
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