NeuroNoC: neural network inspired runtime adaptation for an on-chip communication architecture
2010
The on-chip communication architecture presented in this paper, NeuroNoC, addresses the problems arising in large multi-core systems where global or local routing strategies do not work efficiently anymore since they either do not scale or lack information on the network state. Our communication architecture is runtime adaptive and it deploys a distributed artificial neural network to aid routing decisions. It thereby provides a light-weight mechanism for local routing information to propagate through the communication architecture and is capable of self-organizing efficiently (since scalable) to varying communication workload scenarios. The underlying basic concepts are borrowed from spiking neural networks, a special case of artificial neural networks. Our experiments show that already with low hardware overhead, a significant improvement of the runtime routing behavior compared to current state-of-the-art approaches is possible. We report an improvement of 23% in routing quality compared to wXY [9] routing in terms of failed transactions.
Keywords:
- Routing domain
- Real-time computing
- Link-state routing protocol
- Policy-based routing
- Multipath routing
- Dynamic Source Routing
- Wireless Routing Protocol
- Computer science
- Static routing
- Equal-cost multi-path routing
- Distributed computing
- Hierarchical routing
- Routing protocol
- Enhanced Interior Gateway Routing Protocol
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