A 12ns/350mW 16Kb ECL Compatible RAM

Masanori Odaka,Shuuichi Miyaoka,Katsumi Ogiue,Kenichi Tonomura,T. Ikeda,Tokumasa Yasui

A 12ns/350mW 16Kb ECL Compatible RAM

1985

Masanori Odaka
Shuuichi Miyaoka
Katsumi Ogiue
Kenichi Tonomura
T. Ikeda
Tokumasa Yasui

A 12ns/350mw 16Kb ECL compatible RAM with bipolar ECL inpur/output buffers has been developed by using 2?m polyside gate CMOS technology which has bipolar transistors with 3GHz cut-off frequency on the same chip.

Keywords:

Read-write memory
Logic gate
Electronic engineering
Computer science
FO4
Bipolar junction transistor
CMOS
Integrated injection logic
Cutoff frequency
Electrical engineering
Chip

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