Impact of EOT scaling down to 0.85nm on 70nm Ge-pFETs technology with STI

For the first time, an STI module is integrated in an advanced 70 nm Ge-pFET technology allowing EOT scaling down to 0.85 nm. Gate leakage is kept below 0.2A/cm 2 and ION is increased inversely proportional to the EOT. The impact of this aggressive EOT scaling on hole mobility is also investigated by temperature measurements down to 4 K, suggesting the presence of defects at different levels of the Si/SiO 2 /HfO 2 gate stack.