Degradation mechanisms in polysilicon emitter bipolar junction transistors for digital applications

Abstract This paper is a thorough overview on polysilicon bipolar junction transistors’ (BJTs) reliability, with focus on transistors for digital applications, where the base–emitter junction switches from forward to reverse bias (low fields) and the base–collector junction is reverse biased at high fields. The effects of base–emitter reverse biasing are generation, charging and discharging of traps in silicon oxide or at the Si–SiO 2 interface near the base–emitter junction; their understanding is essential to model transistor current gain degradation and low frequency noise increase. Failure modes and mechanisms, degradation kinetics, lifetime models and physical phenomena related to device aging will be discussed. The base–emitter junction is also stressed by high currents, which lead, for example, to electromigration phenomena. The base–collector junction degradation is mainly due to high field and impact-ionization effects. Reliability constraints are now an important component of a correct design methodology in deep-sub-micron integrated circuits.