Computer system having a contained in a chipset memory controller for controlling accesses to an isolated store for isolated execution

The computer system (100) (A) at least one processor (110) which can be operated in a normal and in an isolated execution mode, the contents of a processor control register (252) indicating whether the processor (110) is in the isolated execution mode, (B) a system memory (140) having an insulated area of ​​physical memory (70) to which the processor (110) can access only in the isolated execution mode, and (C) a to said processor (110) and system memory (140) coupled to chipset (130, 150, 160), coupled to the system memory (140) access control means (135) includes, wherein the isolated execution mode by executing a privileged instruction (iso_init) in the processor (110) is initialized, which calls a processor nub loader (52) and into the isolated memory area (70) loads, wherein the processor nub loader ( 52) (in the chipset 130, 150, 160) holding a protected bootstrap loader code is, loads a processor nub software module (18) (in the isolated memory area 70) and verifies its integrity, wherein the processor nub provides hardware-related software module (18) services for the isolated execution available wherein said access control means (135) comprises: (C1) a configurable by the processor (110) configuration memory (610) defining a the insulated area of ​​physical memory (70) configuration setting (612) in memory range registers (620, 630) stores, (C2) receiving an access grant generator (650) which, when an access transaction from the processor (110) access information (660), a physical ...