Design of high efficiency interleaved active clamp zero voltage switching forward converter
1999
A high efficiency interleaved active clamp forward converter with self-driven synchronous rectifiers for a modular power processor is presented. To simplify the gate drive circuits, the n–p MOSFETs coupled active clamp method is used. An efficiency of about 90% for a load range of 50-100% is achieved. Details of design for the power stage and current mode control circuit are provided, and also some experimental results are given.
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