5nm CMOS Production Technology Platform featuring full-fledged EUV, and High Mobility Channel FinFETs with densest 0.021µm 2 SRAM cells for Mobile SoC and High Performance Computing Applications

A leading edge 5nm CMOS platform technology has been defined and optimized for mobile and HPC applications. This industry-leading 5nm technology features, for the first time, full-fledged EUV, and high mobility channel (HMC) finFETs with densest 0.021µm2 HD SRAM. This true 5nm CMOS platform technology is a full node scaling from our successful 7nm node [4] in offering ~1.84x logic density, 15% speed gain or 30% power reduction. The 5nm platform technology successfully passed qualification [3] with consistently high yielding 256Mb HD/HC SRAM, and large logic test chip consisting of CPU/GPU/SoC blocks. Currently in risk production, this true 5nm platform technology is on schedule for high volume production in 1H 2020.