A Charged Particle Detector for Preserving Temporal Information

1996 
A prototype integrated circuit is described which uses a 32-phase clock to record the arrival time of incident particles. The chip architecture is such that data can be acquired continuously to a timing resolution of 1ns and up to a peak input frequency approaching 500MHz. The device incorporates cache memory and write only if data (WOID) techniques to maximize the throughput of the chip. A novel feedback circuit has been implemented in the delay line to ensure that the chip is immune to both temperature and voltage variations. Output data from the prototype device is written out continuously onto a 16-bit data bus.
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