Optimized execution of morphological reconstruction in large medical images on embedded devices

This work presents a hardware/software co-design implementation of the morphological reconstruction targeting a System-on-Chip (SoC) FPGA-based embedded system. Our approach processes large images with fast algorithms. This was achieved by the proposal and use of an execution scheme that partitions the input image into sub-images that are independently processed before a second phase is executed to enable propagation of information among sub-images. The SoC is efficiently used by processing sub-images on hardware (the costly phase), while the software takes care of computations due to discontinuities that are irregular and inefficient for the hardware execution. Several optimizations were proposed, including parallel software and hardware execution and the use of borders to minimize computations in the discontinuities correction. This enables the processing of large images from our use-case brain cancer tissue image analysis application. For an image of $$8192 \times 8192$$ pixels, our co-design solution attains a speedup of 12.7 $$\times$$ vs. the software execution (Dual core ARM A9 Cortex).