Test chips for die stress characterization using arrays of CMOS sensors

This paper demonstrates the use of special test chips containing arrays of CMOS FET differential pairs as mechanical stress sensors and reports the first results of measurements of packaging induced die stresses for temperatures ranging from the epoxy cure temperature (430 K) to near liquid nitrogen temperature (90 K). The experimental test chip consists of 49 CMOS stress sensor rosettes distributed across the die and interconnected by a novel scheme.