13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network

We are approaching an age of IoT, in which sensors and controllers in all types of devices, including smart phones and PCs, are connected together. The strongest candidate fora wireless interface is the Bluetooth Low Energy® (BLE) standard because it is already widely used in smart phones. Many markets, especially for wearable devices like smart watches, demand BLE devices with a small module area and low current consumption. In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image blocking violation without exception rule or the use of additional off-chip filters. In the TX, meanwhile, the calibration incurs a weakness in terms of the offset issue. Moreover, there is no approach to achieve "zero" external components for the RF port. In this paper, a BLE transceiver, with a reconfigurable filter, embedded into an on-chip matching network without any external components, is presented.