Methods and Analysis of Automated Trace Alignment Under Power Obfuscation in Side Channel Attacks

Embedded systems are widely deployed in life-critical systems, but system constraints often limit the depth of security used in these devices, potentially leaving them open to numerous threats. Side channel attacks (SCAs) are a popular attack to extract sensitive information from embedded systems using only side channel leakage. Existing research has focused on obfuscating the sensitive data and operations with the assumption that attackers can readily and automatically identify the location of the sensitive operations in each trace, which is needed to align traces for a successful SCA. However, this is not always the true as the target sensitive data may be randomly located within side channel leakage trace, which necessitates the use of automatic preprocessing to identifying those locations. Limited research has focused on the evaluation of identifying these locations and the difficulty for attacker to identify the location of sensitive information within side channel leakage traces. This paper presents a methodology for evaluating power obfuscation approaches that seek to obfuscate the location of sensitive operation within the power trace, thereby significantly increasing the complexity of automated trace alignment. This paper presents a new adversary model and proposes a new metric, mean trials to success (MTTS), to evaluate different power obfuscation methods in the context of automated trace alignment. We evaluate two common obfuscation methods, namely, instruction shuffling and random instruction insertion, and we present a new obfuscation method using power shaping to intentionally mislead the attacker.