FPGA Synthesis of an AES Encoder Circuit for Vehicular Communication Networks

Data security is essential for all network applications including vehicular communications. Vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) wireless communication links are exposed various attacks involving data that are critical for the passenger safety. Therefore we must secure the vehicular data in order to avoid false information to be sent to the drivers and accidents to be produced. We choose Advanced Encryption Standard (AES) to implement as a hardware data encryption module with good performances, focused on low delay and high-speed data processing in defiance of the circuit area. FPGA synthesis of the AES-128 circuit is done and its performances are presented.