Design methodologies and tools forcircuit design inCMOS nanometer technologies

2006 
CMOS technology isevolving deeperanddeeper intothenanometer era.Highlyintegrated systems arenow beingdesigned, manyofwhicharemixed-signal, including analog and/or RF parts. Although thetechnological roadmap stays ontrack, theactual design ofcircuits in65nmandbelow becomesa bigbottleneck, thatmay eventurnouttobea showstopper, ifnot addressed properly. Risingdesign complexities, tightening time-to-market constraints, leakage power, increasing technology tolerances, reducing supply voltages andworsening signal integrity conditions arekey challenges thatdesigners face. Noveltypesofdevices, new process materials andnewreliability issues arenextonthe horizon. EDA tools simply havebecomeinevitable todesign today's highly integrated systems (SoCorSiP). Thisinvited paperpresents anoverview ofthedesign methodologies and EDA tools thathavebeenorarebeing developed toaddress the problems ofdesigning suchmixed-signal integrated systems. In particular, progress isdescribed inmodeling andsimulation techniques forcomplexmixed-signal systems, incircuit and layoutsynthesis toolsforanalog/RF circuits, in yield optimization aswellasinsignal integrity analysis methods suchassubstrate noise andEMC/EMIanalysis. Thiswillbe illustrated withseveral practical examples. 3!1r;0i ll~~~~~~~~~~~~~~~~~~~ MPIfGTar,iM6WCh4" 2 r-Tiil1tO If i E' Bi i irSU' 1U I e I
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