Design issues for lateral double-diffused metal-oxide-semiconductor with higher breakdown voltage.

In this paper, we discuss a new High-Side nLDMOSFET whose breakdown voltage is over 100 V while meeting the thermal budget for the conventional process. The proposed n-channel lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) has a feature in that the structure comprises a gap of 5 microm between the DEEP N-WELL and the center of the source, the surface of which is implanted by the NADJUST-layer for high breakdown voltage and simultaneously the low specific on-resistance. The computer simulation of the proposed High-Side nLDMOS exhibits BVdss of 126 V and R(ON,sp) of as low as 2.50 m(omega) x cm2. The NBL, which plays a significant role as a blocking layer against the punch-through seems to function as a hurdle for increasing the breakdown voltage.