Method of configurable memory protection against permanent and transient errors and apparent device

The invention relates to a digital memory protection method against permanent and transient errors and a related apparatus. The digital data being stored in at least one storage area (104), said area corresponding to a storage matrix of memory cells organized into a given number of rows and columns, said method comprises: - an encoding step (101) generating codewords from data organized into binary words by applying an asymmetric code introducing at least two different protection levels, the first level of protection words being associated with a first bit subgroup code word and a second level of said bottom shield being associated with a second subgroup of the same word; a bit position exchange step of the code word (102) for storage by matching the bit level of protection to the columns of the storage area having the defective memory cells and the bit low security level to remaining columns. The invention applies in particular to areas of digital electronics and nanoscale technologies. The invention can be used, for example, in data storage systems.