Study on Chip Reliability Modeling Based on Mutually Dependent Competing Failure of Solder Joints in Different Failure Modes

The chip is a core functional component. Its reliability plays a vital role in electronic equipment normal operation. As the typical cause for chip malfunction, the solder joint degradation is selected to study chip reliability. The degradation models of solder joint in different failure modes are established through data-driven and failure physical model, and chip reliability model is constructed based on mutually competing failures of multiple solder joints. First, the chip reliability degradation test and finite element modeling(FEM) are carried out under coupled environment stress. The solder joint failure modes and degradation processes are studied through the analysis of test data, microstructure and mechanical simulation. Then, solder joint degradation models are established based on Coffin-Manson and Paris functions that have been modified by a data-driven method. Taking the solder joint failure time of degradation model as the characteristic parameter of Weibull distribution, the solder joint reliability function is obtained. Finally, mutually dependent competing failure theory is cited to describe the correlation about solder joint reliability of different failure modes, then the chip reliability model is established. The parameter estimation is realized by the inference function for margins (IFM) method. From verification tests, results show models are highly consistent with the actual reliability, indicting our reliability modeling method achieves the transition from underlying solder joint level to integrated component level. The joint application of different models can make up for the deficiencies of the single model and obtain more accurate results. In addition, we determined that intermetallic compounds (IMC) are main source of model error.