Study on ROM Subdivision Based on CPLD

A circuit of direction recognizing and subdivision made use of CPLD to process grating signal is presented.The authors analyzed reason of counting error of counting circuit with computer and resolved this problem by processing subdivision data using FSM(Finite State Machine) in VHDL,therefore,it can process signal with wide dynamic range and consists of better adaptability.There is high speed for substituting hardware look-up-table for software look-up-table.It is provided with simple structure to use CPLD as logic controller and counter.We confirmed its advantages by experiment.