A gate structure for a semiconductor device

Describes a method of manufacturing the semiconductor device, the semiconductor device includes a substrate having a fin, the fin having a top surface and a first lateral sidewall and a second lateral sidewall. The hard mask layer may be formed (e.g., provide a double gate device) on the top surface of the fin. A gate dielectric layer and the work function metal layer formed on the first and second lateral sidewalls of the fin lateral sidewall. The silicide layer is formed on the fin located on a first lateral sidewall and a work function of the metal layer on the second lateral sidewall. Silicide layer may be a fully silicided layer and may provide stress to the channel region of the device provided in the fins. The present invention provides a gate structure for a semiconductor device.