Study of suitable filter architectures for FBMC techniques applied to PLC communications

Multi-carrier approaches have arisen in the last years as a suitable medium access technique for many communications standards, such as PowerLine Communications (PLC). This one is based on using mains for data transmission, not only in industrial environments but also in public buildings, residences and houses. One of these multi-carrier solutions is based on the Filter-Bank Multi-Carrier (FBMC), where a polyphase filter bank is used to obtain greater spectral separation in the information transmitted over each subcarrier, or higher robustness in noisy environments. Nevertheless, these techniques often imply a high computational load, with also high data rates, which make difficult to achieve real-time implementations for the approaches. This work analyses three different architectures that can be applied to the polyphase filter bank implementation in a FBMC technique for PLC. Every proposal is studied in terms of quantization errors, due to fixed-point representation, and in terms of resource consumption, always taking into account that a FPGA (Field-Programmable Gate Array) device has been considered for the final deployment.