Abnormal Multiple Charge Memory States in Exfoliated Few-Layer WSe2 Transistors

To construct reliable nanoelectronic devices based on emerging 2D layered semiconductors, we need to understand the charge-trapping processes in such devices. Additionally, the identified charge-trapping schemes in such layered materials could be further exploited to make multibit (or highly desirable analog-tunable) memory devices. Here, we present a study on the abnormal charge-trapping or memory characteristics of few-layer WSe2 transistors. This work shows that multiple charge-trapping states with large extrema spacing, long retention time, and analog tunability can be excited in the transistors made from mechanically exfoliated few-layer WSe2 flakes, whereas they cannot be generated in widely studied few-layer MoS2 transistors. Such charge-trapping characteristics of WSe2 transistors are attributed to the exfoliation-induced interlayer deformation on the cleaved surfaces of few-layer WSe2 flakes, which can spontaneously form ambipolar charge-trapping sites. Our additional results from surface charact...