Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof

The invention discloses an integrated wafer-level vacuum packaged MEMS device and a manufacturing method thereof. The manufacturing method comprises the following steps: forming an MEMS structure on a monocrystalline silicon wafer substrate; forming a first sacrificial layer on the MEMS structure; forming a patterned electrode layer on the first sacrificial layer; forming a second sacrificial layer on the electrode layer; forming a sealed cavity on the monocrystalline silicon wafer substrate located below the MEMS structure and sealing the cavity with a third sacrificial layer; allowing the second and third sacrificial layers to be patterned; forming a cover layer on the third sacrificial layer; allowing the cover layer to be patterned and removing the first, second and third sacrificial layers to enable the MEMS structure to be released; forming a sealing structure on the cover layer; forming a metal lead wire on the sealing structure; and carrying out low temperature annealing. According to the invention, the MEMS structure is a monocrystalline silicon material and is anchored on the upper part of a packaging structure, so influence of the stress of the substrate on the device is reduced; a gap between an electrode and the MEMS structure is fairly small, so energy loss of the device is reduced, and low cost and high quality of the MEMS device are obtained.