Degradation Monitoring - from a Vision to Reality.

This paper describes a reliability degradation modeling and monitoring method based on a combination of IC novel embedded circuits, and off-chip machine learning algorithms which infer the digital readouts of these circuits during test and operational lifetime. Together, they monitor the margin degradation of an IC, as well as other vital parameters of the IC and its environmental stress. This method enables the prevention of future failures, and points to the Physics of Failure, thus estimating the time to failure.