A substrate of a large multi-chip integrated chip and port interconnection class implementation method

The present invention provides a multilayer wiring board built on a large multi-chip integrated chip interconnect port interconnection and physical implementation class method, applied to a substrate made of a multi-chip integrated interconnect structure and method for constructing a multi-chip layout, a pin array substrate divided and distribution, the high-speed differential signal pin pair and a valid partition division method of dispensing, the substrate wiring interconnecting the corresponding multi-chip type chip arrangement. In the present invention the package dimensions on a substrate, to achieve an equivalent effective large class chip interconnect port. Compared to the corresponding single-chip integration implemented method, the method of the present invention can support multiple interconnect structure, the interconnect is compatible with a variety of sub-chip micro-architecture, and can effectively utilize the characteristics of different functional sub-chip interconnect, in the chip implementation of cost, scalability, flexibility, compatibility with better balance, while on the lower integrated circuit fabrication techniques to achieve the desired requirements, which can provide a number of different ports, different specifications of interconnected chips in the meet market demand, more flexible.