Old Web
English
Sign In
Acemap
>
Paper
>
Design and Implementation of Adder for Modulo 2 n +1 Addition
Design and Implementation of Adder for Modulo 2 n +1 Addition
2014
D. sowjanya
B. Anilkumar
Keywords:
Parallel computing
Serial binary adder
Carry-save adder
Modulo
Computer science
Adder
Arithmetic
Correction
Source
Cite
Save
Machine Reading By IdeaReader
2
References
1
Citations
NaN
KQI
[]