Bit Synchronization Using Violation Bit Detection in 13.56MHz RFID PJM Tag

To successfully accomplish a bit synchronization, a synchronizer should exploit a preamble pattern. A MFM (modified frequency modulation) flag is uses as a preamble in a PJM (phase jitter modulation) mode RFID standard. In the recent work, a synchronizer for a PJM mode tag was proposed, which is composed of several correlators. In this paper, we present a new bit synchronizer in which a coarse synchronization is done as in the previous work while a fine synchronization is performed via exploiting a violation bit included in the MFM flag. We show that the proposed synchronizer can significantly reduce the overall hardware complexity at the expense of slight burden to a demodulator structure. Through simulation, we also show that its performance is comparable to that of the previous system despite its hardware simplicity.