Semi-systolic architecture with carry-save arithmetic for binary correlators in spread-spectrum-systems
1991
An architecture of a binary correlator is described. Efficient hardware realization is achieved through carry-save arithmetic in a semi-systolic array. Flexibility of floor-planning and parametrizable modules on word level allow the implementation of arbitrary correlation length and input word length. The response time of the correlator with contradata-flow-structure is independent of the realized correlation length. The testcircuit reaches clock frequencies of typically 75 MHz. Therefore this circuit is a feasible substitution for analog components in this frequency range.
Keywords:
- Binary number
- Synchronization
- Arithmetic
- Parallel computing
- Spread spectrum
- Correlation function (statistical mechanics)
- Architecture
- Electronic engineering
- Response time
- Throughput
- Computer science
- Systolic array
- Clinical psychology
- Neurotransmitter
- Limbic system
- Anxiolytic
- Psychopharmacology
- GABAA receptor
- Anxiogenic
- Partial agonist
- Anxiety
- Psychology
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