A 180 nm copper/low-k CMOS technology with dual gate oxide optimized for low power and low cost consumer wireless applications

2000 
We report a 180 nm CMOS technology with dual gate oxide (DGO) optimized for low power and low cost consumer wireless products. To minimize cost and maximize manufacturability, super halo is used for the first time to integrate 70 /spl Aring/ 2.5-3.3 V I/O devices with either 130 nm/29 /spl Aring/ or 150 nm/35 /spl Aring/ low leakage (LL) p/spl Aring///spl mu/m devices, eliminating three normally-required masks. Core LL devices optimized for 1.5 V and 1.8 V are available to maximize circuit design compatibility and IP reuse. Both LL devices yield superior performance, and less I/sub on//I/sub off/ sensitivity vs. gate-length control for robust manufacturing as compared to recently reported LL devices. This technology also features an all-layer copper/low-k interlayer dielectric backend for speed improvement and dynamic power reduction.
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