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A Self-Adaptive and PVT Insensitive Clock Distribution Network Design for High-Speed Memory Interfaces
A Self-Adaptive and PVT Insensitive Clock Distribution Network Design for High-Speed Memory Interfaces
2009
Feng Lin
Brent Keeth
Keywords:
Electronic engineering
Current-mode logic
Electronic circuit
CMOS
Network planning and design
Process design
Voltage
Computer science
Automatic identification and data capture
self adaptive
distribution networks
random access memory
high speed memory
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