Mechanically compliant lead-free solder metallurgy: The key element in enabling extreme low-k large-die flip chip devices

2012 
Significant challenges are encountered to enable large-die fine-pitch lead-free-bump flip chip devices, especially with extreme low-k (ELK) silicon technology for 40 nm and beyond. Such failures are often observed as die ELK stack-up fractures, lead-free bump cracking, underfill delamination, high warpage-induced BGA reliability issues, etc. The underlying root cause can be attributed to elevated thermo-mechanical stress within the packaging when lead-free bump material is used for the die-to-packaging interconnect. This paper presents an innovative approach to addressing these technical problems by applying mechanically compliant lead-free bump metallurgy. In conjunction with several other aspects of assembly and packaging material optimization, this solution is capable of delivering 100% lead-free flipchip packaging with a die size of up to 20×20 mm and a package size of up to 52.5×52.5 mm per side.
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