Design of a compact direct digital frequency synthesizer with 12 bit amplitude and 32 bit frequency resolution

This paper describes the design of a monolithic direct digital frequency synthesizer. The circuit realizes a 12 bit output sine wave with a frequency resolution of 32 bit. The core of the 1.2 /spl mu/m CMOS implementation consists of approximately 6,000 transistors and occupies an area not larger than 1.5 mm/sup 2/. The circuit is aimed at a maximum tuning range of 100 MHz, or equivalently, a clock rate of 200 MHz. This upper value yields a minimum frequency increment of 0.023 Hz. The system exhibits a total latency of 14 clock periods.