42.1: Distinquished Paper: A 1.4‐Gbps Intra‐Panel Interface for Chip‐On‐Glass TFT‐LCD Applications

A high-speed intra-panel interface with an enhanced reduced voltage differential signaling (eRVDS) scheme is implemented in a 0.18-μm high-voltage CMOS process for the chip-on-glass (COG) TFT-LCD applications. The proposed interface employs the zero-adjustable equalizer to enhance the maximum data rate, the early charge sharing scheme to improve the interface data transfer efficiency, and dynamic biasing technique to reduce a power consumption of the output buffers. Measured result demonstrates the maximum data rate of 1.4 Gbps from a 1.8-V supply voltage with a WQXGA 60-Hz COG TFT-LCD prototype panel.