이중 대역 RFID 리더에 적용 가능한 Concurrent 이중 대역 저잡음 증폭기 설계 연구

In this paper, we deal wih a concurrent dual band low noise amplifier for a Radio Frequency Identification(RFID) reader operating at 912㎒ and 2.45㎓. The design of the low noise amplifier is based on the TSMC 0.l8㎛ CMOS technology. The chip size is 1.8㎜×1.8㎜. To improve the noise figure of the circuit, SMD components and a bonding wire inductor are applied to input matching. Simulation results show that the S21 parameter is 11.41㏈ and 9.98㏈ at 912㎒ and 2.45㎓, respectively. The noise figure is also determined to 1.25㏈ and 3.08㏈ at the same frequencies with a power consumption of 8.95㎽.