Automatic Synthesizable HDL Generator for NoGAP

ASIP are needed to handle the future demand of flexible yet high performance computation in mobile devices. However designing an ASIP is complicated by the fact that not only the processor, but also tools such as assemblers, simulators, and compilers have to be designed. No GAP is a design automation tool for ASIP design that imposes very few limitations on the designer. Yet No GAP supports the designer by automating much of the tedious and error prone tasks associated with ASIP design. This paper presented the methodology to fully generate a synthesizable HDL from NoGAPCL description in No GAP system. The advantage of No GAP is that it is a unify process without any architecture restriction. The case study shows No GAP can successfully generate ASIP's HDL description and the hardware generated by No GAP does not incur any performance loss than manually handled design.