Progress and challenges in the direct monolithic integration of III–V devices and Si CMOS on silicon substrates

We present results on the direct monolithic integration of III–V devices and Si CMOS on a silicon substrate. Through optimization of device fabrication and material growth processes III–V devices with electrical performance comparable to devices grown on native III–V substrates were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). While the results presented here are for InP HBTs, our direct heterogeneously integration approach is equally applicable to other III–V electronic (FETs, HEMTs) and opto-electronic (photodiodes, VSCLS) devices and opens the door to a new class of highly integrated, high performance, mixed signal circuits.