The semiconductor device arrangement for the reduction of cross currents in a semiconductor body

Disclosed is a semiconductor device assembly comprising: a semiconductor body (100) having a first and a second semiconductor layer (110, 120); in the second semiconductor layer (120): a first device region (11), a second device region (13) and a collection zone (12) of a complementary to the first conductivity type said second conductivity type; a first contact zone (21) between the first device region (11) and the collection zone (12) is arranged, which is connected to a terminal for a defined bias potential and which extends into the first semiconductor layer (110) extends; is arranged a second contact zone (22) between the first device region (11) and the second device region (13), which is electrically conductive at the collection zone (12) is connected and which extends into the first semiconductor layer (110) extends; at least one third contact zone (31) which is electrically conductively connected to the collecting zone (12) which is spaced further from the first device region (11) than the second contact zone (22) and which extends into the first semiconductor layer (110) extends.