A Low-voltage, Fault-tolerant m icroprocessor

Digital logic circuits are most energy-efficient when operated at very low (near subthreshold) voltages. However, many severely energy-constrained applications (e.g., implanted medical devices) also require high reliability, and the rate of radiation-induced soft-errors increases significantly at low voltages [1]. Existing techniques for improving soft-error resilience come with significant power overhead. The purpose of this project is to investigate error detection and correction mechanisms, for both memory and logic, which are specifically optimized for micropower, low-voltage systems.