A comparison study of DTSCR by TCAD and VFTLP for CDM ESD protection

This paper reports a study of transient behaviors of diode-triggered silicon-controlled rectifier (DTSCR) electrostatic discharging (ESD) protection structures for ultra-fast Charged Device Model (CDM) ESD protection. The DTSCR ESD protection structures, fabricated in a 28nm CMOS process, were characterized using a new combined Very Fast Transmission Line Pulse (VFTLP) testing and TCAD simulation approach, which resolves the deficiency problem of VFTLP testing due to the effects of ultra-short duration of CDM ESD pulse waveforms. The result reveals critical difference of DTSCR behaviors under VFTLP and real CDM ESD that gives a better evaluation of overshooting, turn-on time, turn-on delay, etc.