High Temperature Barrier Electrode Technology for High Density Ferroelectric Memories with Stacked Capacitor Structure

This paper describes the novel stacked electrode structure, PtRhO x /PtRh/PtRhO x , applicable to stacked memory cells in advanced ferroelectric memories. This structure acts as a stable bottom electrode and a barrier on a polysilicon plug up to 700°C and a stable contact resistance of 1.5 KΩ is obtained at the contact size of 0.6 μm. In addition to the low leakage current of lead zirconate titanate [PZT, Pb(Zr 0.52 Ti 0.48 )O 3 ] capacitor (10 8 A/cm 2 at 3 V), degradation properties of fatigue and imprint are improved compared with conventional Pt electrodes. The decrease of the switched charge is restricted to less than 10% after the fatigue cycle of 10 11 . These results indicate its promise as a barrier electrode structure for advanced ferroelectric memory integration.