In-pixel implementation of an area-efficient analog-signal-processing for CMOS-3D image sensor

The paper presents the design and test of a 32×32 CMOS 3D-image sensor, based-on indirect time-of-flight (ToF) technique with its derived algorithm: MDSI (multiple double short time integration). The design key feature is the implementation, in pixel-level, of analog signal processing; namely: correlated double sampling (CDS) and analog averaging. Which leads to a significant enhancement in term of signal-to-noise ratio (SNR), while keeping reasonable fill-factor and power consumption. The chip has been fabricated using 0.6um standard CMOS process. The overall achieved performances exhibit an interesting trade-off.