Dual-Sensitivity Mode CMOS Image Sensor for Wide Dynamic Range Using Column Capacitors

A wide dynamic range (WDR) CMOS image sensor (CIS) was developed with a specialized readout architecture for realizing highsensitivity (HS) and low-sensitivity (LS) reading modes. The proposed pixel is basically a three-transistor (3T) active pixel sensor (APS) structure with an additional transistor. In the developed WDR CIS, only one mode between the HS mode for relatively weak light intensity and the LS mode for the strong light intensity is activated by an external controlling signal, and then the selected signal is read through each column-parallel readout circuit. The LS mode is implemented with the column capacitors and a feedback structure for adjusting column capacitor size. In particular, the feedback circuit makes it possible to change the column node capacitance automatically by using the incident light intensity. As a result, the proposed CIS achieved a wide dynamic range of 94 dB by synthesizing output signals from both modes. The prototype CIS is implemented with 0.18-μm 1-poly 6-metal (1P6M) standard CMOS technology, and the number of effective pixels is 176 (H) × 144 (V).