Signal acquisition device of synchronous serial output shaft encoder

The utility model discloses a signal acquisition device of a synchronous serial output shaft encoder. The device comprises an absolute type encoder, a DSP chip, a FPGA chip, a difference transmitting circuit and a difference receiving circuit. The FPGA chip sends a synchronous clock control signal. The signal is transmitted to the absolute type encoder through the difference transmitting circuit. Gray code data output by the absolute type encoder is controlled by the synchronous clock control signal and is sent to the FPGA chip as a serial data form through the difference receiving circuit. And the data is converted into binary data through the FPGA chip. According to DSP chip addressing, the FPGA chip sends the binary data stored in an intermediate register to a data bus so that the DSP chip can read the data. The data is displayed through an upper computer connected with the DSP. By using an acquisition system of the utility model, the signal of the absolute type encoder can be accurately and rapidly detected.