High-Level Hardware Description of a CNN-Based Algorithm for Short Exposure Stellar Images Processing on a HPRC

A CNN-based algorithm, adequate for short exposure image processing and an application-specific computing architecture developed to accelerate its execution are presented. Algorithm is based on a flexible and scalable CNN architecture specifically designed to optimize the projection of CNN kernels on a programmable circuit. The objective of the proposed algorithm is to minimize the adverse effect that atmospheric disturbance has on the images obtained by terrestrial telescopes. Algorithm main features are that it can be adapted to the detection of several astronomical objects and it supports multi-stellar images. The implementation platform made use of a High Performance Reconfigurable Computer (HPRC) combining general purpose standard microprocessors with custom hardware accelerators based on FPGAs, to speed up execution time. The hardware synthesis of the CNN model has been carried out using high level hardware description languages, instead of traditional Hardware Description Languages (HDL).