Design and simulation of a RISC-based 32-bit embedded on-board computer

This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional bread-boarded prototype: 1) we used the Cadence EDA environment and Logic Modeling hardware simulator to verify the conceptual design. (2) An Aptix FPCB was used to implement the first-version hardware system. (3) A simple but effective self-made ICE (In-Circuit Emulator) was used to perform target system verification while software was running on an IDT 79S381 Evaluation Board. The whole hardware system was first simulated conceptually under an EDA environment, and then was simulated with the basic software codes. This method is effective in an embedded system design.