Facile 3D integration of Si nanowires on Bosch-etched sidewalls for stacked channel transistors

Three-dimensional (3D) integration is a promising strategy to integrate more functions into a given footprint. In this work, we report on a convenient new strategy to grow and integrate high density Si nanowire (SiNW) arrays on the parallel sidewall grooves formed by Bosch etching, via a low temperature ( 107 and a hole mobility of 57 cm2 V−1 s−1, in a unique vertical side-gate configuration. These results highlight the unique potential and benefit of combining conventional Bosch processing with high precision 3D guided growth of SiNWs for constructing more complex and functional stacked channel electronics.